RAW  DATA BANKS
 
 

• COT
• COTD --> COTQ     module to compress exists:
•     bool CotEventdata::writeCotqBank(EventRecord* event)
• need  to have a reverse module, for TrgSim to run off COTD ( although loss of info, but the hardware runs off COTD)
• Silicon
• SIXD_StorableBank  -->  SVXQ
• Calorimeter
• CEMD, CHAD, PEMD, PHAD,WHAD -->CalData   module to compress exists:
• module CalDataMaker

 
• CESD, CPRD,CCRD,PESD
• CPRQ and CPRQ_Coll : CPRQ contains just 2 words, channelID and energy for wires with energy greater than a certain threshold set via talk-to in the module CPRQModule ( which reads CPRD)
• talk given at the joint physics group meeting, Nov 01, 2001
 
• CESQ and CESQ_Storable : CESQ contains just 2 words, channelID and energy for strips with energy greater than a certain threshold set via talk-to in the module CESQModule ( which reads CESD)
• talk given at the joint physics group meeting, Nov 01, 2001
 
• PESQ and PESQ_Coll: PESQ contains just 2 words, strip location and energy for strips with energy greater than a certain threshold set via talk-to in the module PESQModule ( which reads PlugStripCollection)
• talk given at the joint physics group meeting, Nov 01, 2001

 

 
 
 

• CCRQ  - no simulation?
 

 
 
 
•  M. Riveline on CesClusterColl:

After changing the types of the objects streamed out of the CesCluster, I
ooked at the size of a CesCluster, seed based, with only basic
threshold cuts (E(seed)>0.1, E(strip)>0.1) and on ttbar (MDC2) events.
This is an average over 10 events:

                        Size = 6440 +/- 1100 Bytes
Given that we would expect <= 50% increase with track-based CesCluster,
the 2 objects would take ~9kBytes/event.
I don't know what to think about this number. Compared to the Em
Cluster, it is certainly very large (EmClusterColl is usually < 1kBytes).
This is probably due to the fact that there can be more than 1 Ces cluster
per Em cluster. On the other hand, I can probably reduced the size by a
little bit by not streaming the width and the error on the width of the
cluster.
 

• Muons
• CMUD, CMPD, CMXD, CSPD, CSXD
• Tracking
• TRKQ
• Trigger
• TL2D, TC2D, TC1D, TL1D, TFRD, SL1D

TC2D has actually a big waste of space: it contains 2 words for each tower, an energy word, where only 20 bits are used ( 10 for EM and 10 for HAD) and  a usage word ( clustering result) where only 7 bits are used out of 32.
It could be rewritten as a 1 word/tower bank reducing the size of just less than  50% ( overhead remains).
TC1D is quite packed already, I don't see way to compress further
TL1D is a very small bank and this means big overhead . I suggest it should be combined with some other bank ( there is a L1 block in TL1D). There is also a large fraction of unsed buts and some rearrangements could be beneficial:
    Sumet block: 1st word header
2nd word bits used 23:0 ( out of 32) MET
3rd word all bits used
4th word 21 bits unused ( 11 for SumET)
CalTrg block: 1st word header
2nd word 12 bits unused
3rd word 10 bits unused
MuTrig   same as CalTrig
TRKTrig same as Caltrig
BSCTrig same as CalTrig
Multi purpose block, same as CalTrig


TFRD all bits used, but small, could combine with SL1D ( large bank, just add a "card/block")

SL1D ( scalers) all  bits used
 
 

• Time Of Flight TOFD->TOFQ

 
• Calibration BANKS
1. Calorimeter calibration banks:
1.  CEMC     16 blocks -> #cards->#chips/card->5 32 bits (1+4) words/chip
2.  CHAC      16 blocks -> #cards->#chips/card->5 32 bits (1+4)words/chip
3.  WHAC     8 blocks -> #cards->#chips/card->5 32 bits (1+4) words/chip
4.  PEMC     12 blocks -> #cards->#chips/card->5 32 bits (1+4) words/chip
5.   PHAC      12 blocks -> #cards->#chips/card->5 32 bits (1+4)words/chip
2. Calorimeter Pedestal     banks:
1. CEMP     16 blocks -> #cards->#chips/card->4capacitors/chip->3  32 bits (1+2) words/chip
2. CHAP      16 blocks -> #cards->#chips/card->4capacitors/chip->3  32 bits (1+2) words/chip
3. WHAP      8 blocks -> #cards->#chips/card->4capacitors/chip->3  32 bits (1+2) words/chip
4. PEMP     12 blocks -> #cards->#chips/card->4capacitors/chip->3  32 bits (1+2) words/chip
5. PHAP      12 blocks -> #cards->#chips/card->4capacitors/chip->3  32 bits (1+2) words/chip
1. Cerenkov   CLAC/CLAP same as above 1 block
2. Beam Shower FDAC/FDAP same as above 1 block
3. Miniplug MPAC/MPAP  same as above 4 blocks
1. ShowerMax calibration banks:
1. CESC,CCRC,CPRC 16 blocks->3 cards->6 32 bits words ( 5+1)
2. ShowerMax pedestal banks:
1. CESP,CCRP,CPRP 16 blocks->3 cards->3   32 bits  words ( 2+1)

YBOS/ROOT/EDM  banks overhead ( from R. Kennedy):

*) ABCD_StorableBank writes itself out

•         0) ABCD_StorableBank ROOT class description written out    (16+ bytes?)

 
•         1) ABCD_StorableBank ROOT version number written out       (2 bytes)

 
•         2) StorableObject base class piece is written out          ------------

 
•                 a) StorableObject ROOT version number written out  (2 bytes)

 
•                 b) TObject base class piece is written out         ------------

 
•                         i) TObject ROOT version number written out (2 bytes)

 
•                         ii) TObject persistent data written out    (8 bytes?)

 
•             c) StorableObject persistent data written out      (10+ bytes)

 
•         3) ABCD_StorableBank persistent data written out           ------------

 

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

                a) StorableBank "header" written out               (12 bytes)
 

                b) StorableBank type info written out              (4+ bytes)
 

                c) StorableBank data written out                   (N bytes)
 

Some examples:
 

I've run Trigsim on real data so there will be 2 instances of TC2D_StorableBank:
 

1) real bank  - ByteIn = 5350 in units of bytes
 

2) simulated  - ByteIn = 5358 in units of bytes

The 8 bytes I guessed are the slight difference in the header due to the name.
 

Now, since I know that the pointers sections + data  is 5264 in units of bytes I have an overhead of 86/94 units of bytes.
 
 
 

This is the same I get for TC1D_StorableBank:
 

1) real bank : 2638  ByteIn
 

2) sim bank : 2646 ByteIn

TL1D_StorableBank
 

1) real data  174 ( only writes out Cal prefred)
 

2) simulation 214
 

CONCLUSION : very small banks should be avoided

Note on simulated data only ( tt) :
 

TC2D_StorableBank = 5376
 

TC1D_StorableBank  = 2664
 

TL1D_StorableBank  = 232
 

All of them have 28 words or 112 bytes left.